The Evolving Race for AI Chip Dominance: Huawei Unveils a Bold New Path Past Moore’s Law

The plot is thickening in the high-stakes global race to dominate AI chip technology.

Tingbo He, president of Huawei’s chip design subsidiary HiSilicon, says her team of engineers has developed an entirely new framework for semiconductor optimization. He predicts this innovation will close the long-standing performance gap between Chinese-built chips and their Western-designed equivalents within the next few years.

Put simply, Huawei’s approach prioritizes accelerating computation across chips, individual circuits, and entire computing systems, rather than continuing to cram ever more components onto a single slice of silicon.

“We found a new path,” He announced last weekend at the IEEE International Symposium on Circuits and Systems in Shanghai. Widely known in China as Huawei’s “chip queen,” He pledged the company would prove the real-world viability of the new approach—almost certainly via a new commercial chip—in the coming months. “Before winter 2026, we will bring the surprise,” she said. “Not incremental saturation, not just incremental continuation, but a major leap forward.”

He has named this new guiding framework Tau’s Scaling Law, and says it has already replaced traditional Moore’s Law as HiSilicon’s core development principle. First articulated by Intel co-founder Gordon Moore, Moore’s Law has long held that computing progress relies on roughly doubling the number of transistors (or logic gates) packed onto a single chip every two years.

Producing cutting-edge leading-edge chips today requires etching tiny components into silicon using billion-dollar lithography systems, a supply chain of hyper-precision specialized parts, and decades of cumulative engineering expertise.

Current U.S. export controls bar Huawei from partnering with Taiwan Semiconductor Manufacturing Company (TSMC), the world’s top advanced chip foundry. Instead, Huawei must rely on China’s domestic manufacturer SMIC, which operates with older generations of lithography equipment. These restrictions have severely limited China’s ability to develop frontier AI using homegrown silicon; by most industry estimates, China’s chip manufacturing sector is more than five years behind the global leading edge.

But the global chip industry as a whole has already started hitting hard physical limits of Moore’s Law. When transistors shrink to just a few nanometers wide, quantum effects disrupt their normal function, making further miniaturization exponentially more difficult and costly. Chip designers across the industry have already adopted workarounds for this bottleneck: Apple’s most powerful flagship processors, for example, are built by connecting multiple smaller chip modules to create one far more powerful combined processor.

Huawei’s announcement confirms the company believes it has found a sustainable path around both these physical limits and U.S.-imposed manufacturing restrictions. It also illustrates how sanctions designed to hobble China’s chip industry have actually spurred domestic innovation that could, over time, allow China to build a far more advanced homegrown chip ecosystem capable of competing directly with Western players. In the long run, innovations from firms like Huawei could gradually erode the United States’ long-held technological advantage in semiconductors.

“Six years ago, geometric scaling plateaued for us,” He explained during her speech, referencing the traditional approach of shrinking chip components via lithography. “We soon realized semiconductor evolution means far more than just geometric scaling.”

He outlined multiple key techniques HiSilicon uses to boost chip performance under the new framework. These include a method called LogicFolding, which cuts the time required to run core logical operations within a chip’s circuits.

HiSilicon is also improving performance by adjusting designs to account for nanoscale electronic effects, engineering chips to work in seamless coordination with one another, and developing high-speed interconnects that accelerate communication between separate chips—a critical upgrade for training large, complex AI models.

“For both AI training and inference, the gain is not just in shortening compute time,” He said. “It is in shortening the time that data spends moving, between chips and inside a chip.”

Huawei projects that its new approach will deliver chips with performance matching that of a 1.4-nanometer manufacturing process by 2031. That would drastically narrow China’s gap with global leaders, as TSMC is expected to launch 1.4-nanometer chips commercially in 2028.

He’s announcement does not mean Huawei has a guaranteed clear path to overcoming U.S. sanctions, and not all industry experts are convinced the approach will deliver on its promises. Lennart Heim, an independent semiconductor and AI policy analyst, notes that Huawei’s strategy is an implicit acknowledgement that the company is hitting limits on how much extra performance it can squeeze out of traditional chip shrinking and densification alone. Instead, Heim says, Huawei is increasingly relying on established advanced techniques like hybrid bonding and 3D chip stacking to boost overall performance.

But Huawei’s chip queen remains confident the company will upend the status quo. “These innovations will enter mass production,” He said in her speech. “Maybe not this year, but starting from 2027 and beyond.”

This is an installment of Will Knight’s AI Lab newsletter. Read previous editions here.